#if defined(GP_BSP_ANTENNATUNECONFIG_7DBM_SINGLE_ENDED)
#define GP_BSP_ANTENNATUNECONFIG_INIT()             do{ \
    /* antenna tune parameters for 7DBM_SINGLE_ENDED */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_TX_TUNE(4); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_TX_TUNE(4); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TX_TX_DCA_P(1); */ \
    /* GP_WB_WRITE_TX_TX_DCA_N(1); */ \
    /* GP_WB_WRITE_TX_TX_PA_BIASTRIM_MULT(0); */ \
    }while(0)
#elif defined(GP_BSP_ANTENNATUNECONFIG_7DBM_DIFFERENTIAL)
#define GP_BSP_ANTENNATUNECONFIG_INIT()             do{ \
    /* antenna tune parameters for 7DBM_DIFFERENTIAL */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_TX_TUNE(0); */ \
    GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_TX_TUNE(7); */ \
    GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_TX_TUNE(0); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_TX_TUNE(5); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_TX_TUNE(5); \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TX_TX_DCA_P(1); */ \
    /* GP_WB_WRITE_TX_TX_DCA_N(1); */ \
    /* GP_WB_WRITE_TX_TX_PA_BIASTRIM_MULT(0); */ \
    }while(0)
#elif defined(GP_BSP_ANTENNATUNECONFIG_10DBM_SINGLE_ENDED)
#define GP_BSP_ANTENNATUNECONFIG_INIT()             do{ \
    /* antenna tune parameters for 10DBM_SINGLE_ENDED */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_TX_TUNE(4); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_SELECT(0); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_TUNE(2); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_TX_TUNE(4); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_TUNE(7); */ \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_TUNE(2); \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TX_TX_DCA_P(7); \
    GP_WB_WRITE_TX_TX_DCA_N(7); \
    GP_WB_WRITE_TX_TX_PA_BIASTRIM_MULT(1); \
    }while(0)
#elif defined(GP_BSP_ANTENNATUNECONFIG_10DBM_DIFFERENTIAL)
#define GP_BSP_ANTENNATUNECONFIG_INIT()             do{ \
    /* antenna tune parameters for 10DBM_DIFFERENTIAL */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_TX_TUNE(0); */ \
    GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_TX_TUNE(7); */ \
    GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_SELECT(1); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_TUNE(0); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_TUNE(0); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_TX_TUNE(0); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_TUNE(0); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_TX_TUNE(5); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_SELECT(1); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_SELECT(1); \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_TUNE(2); \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_TUNE(2); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_TX_TUNE(5); \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_SELECT(1); \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_SELECT(1); */ \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_TUNE(2); \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_TUNE(2); \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TX_TX_DCA_P(7); \
    GP_WB_WRITE_TX_TX_DCA_N(7); \
    GP_WB_WRITE_TX_TX_PA_BIASTRIM_MULT(1); \
    }while(0)
#elif defined(GP_BSP_ANTENNATUNECONFIG_FEM_SINGLE_ENDED)
#define GP_BSP_ANTENNATUNECONFIG_INIT()             do{ \
    /* antenna tune parameters for FEM_SINGLE_ENDED */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_SELECT(0); */ \
    GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_TUNE(1); \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_TUNE(7); */ \
    GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_TUNE(1); \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_RX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_SELECT(0); */ \
    GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_TUNE(1); \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_TX_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_TUNE(7); */ \
    GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_TUNE(1); \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_SELECT(0); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_TUNE(1); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT0_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_TX_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_TUNE(7); */ \
    GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_TUNE(1); \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_LOW_ATT_ANT1_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_TX_TUNE(7); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_SELECT(0); */ \
    GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_TUNE(1); \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT0_MATCH_ANT2_RLOAD(0); */ \
    GP_WB_WRITE_TRX_TX_ANT1_MATCH_TX_TUNE(6); \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_SELECT(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_SELECT(1); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_TUNE(7); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_TUNE(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT1_RLOAD(0); */ \
    /* GP_WB_WRITE_TRX_TX_ANT1_MATCH_ANT2_RLOAD(0); */ \
    /* GP_WB_WRITE_TX_TX_DCA_P(1); */ \
    /* GP_WB_WRITE_TX_TX_DCA_N(1); */ \
    /* GP_WB_WRITE_TX_TX_PA_BIASTRIM_MULT(0); */ \
    }while(0)
#else
#error "define one of the antenna tune modes for your design"
#endif

